Multi Function I/O Module for DSP Boards |
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SI-MOD68xx: Technical Specifications
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Analog Inputs
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SI-MOD6816-100
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16 single ended or 8 differential
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100khz
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SI-MOD6832-100
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32 single ended or 16 differential
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200khz
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SI-MOD6800-100
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64 single ended or 32 differential
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400khz
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SI-MOD6816-250
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16 single ended or 8 differential
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250khz
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SI-MOD6832-250
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32 single ended or16 differential
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500khz
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SI-MOD6800-250
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64 single ended or 32 differential
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1Mhz
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+/-10Vp maximum input voltage level, or +/-9.5Vp maximum for the "HG" option.
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High input impedance minimum 1Mohm, DC coupling.
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Precision differential instrumentation amplifiers with gains of 1, 2, 5, 10, part #AD8250 (Analog Devices).
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4:1x2 MUX part #DG409
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Each MUX-PGA-ADC group has 0hz to 100khz/250khz muxed time division sampling on 16 channels, for a maximum additive rate of 400khz/1Mhz on all channels, respectively.
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Up to 4 distinct inputs are simultaneously sampled, one from each MUX-PGA-ADC group.
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Successive Approximation ADCs with 16 bits of resolution:
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100khz part ADS8320/25 (Burr Brown).
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250khz part LTC1864 (Linear Technology).
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Flexible input termination, each channel individually programmable for differential or single ended operation.
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Optional High Gain (-HG) amplification, adds a second amplifier with gains of 1, 2, 5, 10, part #ADS8250 (Analog Devices), extending gain ranges from 1 to 100.
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Timing
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2 internal DDSes, 27 bit resolution phase accumulators.
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4 internal programmable Event Counters, based on divide-by-n 32 bit resolution counters.
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Flexible switching matrix allows timing signals to be routed from onboard resources as well external sources (Quadrature Encoders, Pulse I/Os).
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Digital I/O
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| 36 lines of general purpose digital I/Os:
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4 lines programmable as general purpose I/Os, or as a pair of Quadrature Encoder inputs, or as 4 bidirectional Pulse/Frequency I/O lines.
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Secondary bi-directional 32 bit port, with programmable directional control as two individual 16 bit ports.
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Analog Outputs (optional)
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"-8DAC" or a "-16DAC" option: Up to 8 or 16 DACs for analog output channels, part LTC2600 (Linear Technology).
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Each output has 0hz to 180khz update rates.
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16 bits of resolution.
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+/-10Vp bipolar voltage range.
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Fixed 40khz, 1-pole smoothing filter.
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PC Interface
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| PCI initiated bus master transfer speeds through SI-DSP carrier cards:
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Up to 132Mbyte/sec bursts with block sizes of eight (8) 32 bit words.
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Up to 25Mbyte/sec sustained transfers of any block size, using the DSP carrier card's DMA.
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General Features
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On board 32KByte EEPROM contains offset/gain errors, loaded to FPGA for real time digital calibration on all analog I/O.
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Xilinx XC3S500E Spartan FPGA, internal and external hardware triggers and sample clocks, software triggers.
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Fully programmable with QuVIEW, an accelerator library for LabVIEW.
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Fully programmable with QuBASE, an accelerator library for Visual Basic.
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Full suite of development tools from Sheldon Instruments and several third parties.
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Driver support for all Windows and Linux.
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Physical Dimensions & Electrical Requirements
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3.7"(L) x 3.7"(H), 0.18lbs or 85 grams.
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Supply Voltages: 3.3V for logic circuitry (1.2V and 2.5V generated with onboard regulators), 5V for 32 bit port buffers, and +/-12V for analog circuitry.
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7 Watts typical with minimum configuration: +12Vdc@0.25A, -12Vdc@0.2A, 5Vdc@0.1A, 3.3Vdc@0.35A.
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14 Watts typical with maximum configuration: +12Vdc@0.55A, -12Vdc@0.5A, 5Vdc@0.1A, 3.3Vdc@0.35A.
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