Multi Function I/O Module for DSP Boards |
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Product Details:
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Related Information:
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SI-MOD68xx: Overview
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Key Features
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Up to 64SE/32DE Analog Inputs, 100khz/250khz sampling, 16 bit resolution, 1-100 gains.
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Up to 16 Analog Outputs, 180khz update rates, 16 bit resolution.
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On board 32KByte EEPROM contains offset/gain errors, loaded to FPGA for real time digital calibration on all analog I/O.
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32 digital I/O lines.
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2 Quadrature Encoder inputs, CW/CCW 32 bit position counter, x1/x2/x4 modes, 37.5Mhz sampling.
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2 Pulse inputs for accurately measuring frequency.
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2 PWM outputs, up to 18.75Mhz/53ns resolution.
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Extremely flexible timing with 2 onboard DDSes, 4 Event Counters, and routing matrix allowing a myriad of clocking schemes.
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Small 3.7"x3.7" form factor.
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Software development tools from Sheldon Instruments includes QuVIEW, QuBASE and the SI-DDKs; as well compatibility with separately purchased TI and third party tools.
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Windows and Linux drivers and sample application support.
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Introduction
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| The SI-MOD68xx is a family of high resolution, multi function data acquisition and control modules that plug into any SI-DSP carrier processor card.
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Hardware Features
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| Each card features either 8DE/16SE, 16DE/32SE or 32DE/64SE analog input channels. Every group of 8DE/16SE channels is comprised of its own multiplexer, programmable gain instrumentation amplifier and ADC circuitry. Up to four (4) distinct channels, one from each group, can be simultaneously sampled. The ADC resolution is 16 bits, each with sampling rates ranging from 0hz to 100khz/250khz, or an additive rate of 400khz/1Mhz respectively. The maximum input voltage level is between +/-10Vp (or +/-9.5Vp for the "HG" or high gain option), with gains controlled by a precision differential instrumentation amplifier ranging from 1, 2, 5, 10, along with an optional 20, 50, and 100 for the "HG" option. The ADCs are based on a Successive Approximation architecture, which makes them ideal for control applications. Each input's termination can be individually programmed for differential or single ended operation, thereby not limiting you to an all-or-nothing configuration.
Additionally, up to sixteen (16) analog outputs can each update at rates up to 180khz, with 16 bits of resolution. These bipolar outputs have a maximum +/-10Vp range, along with a 1-pole smoothing filter.
An on board 32KByte EEPROM contains the offset and gain errors which are loaded into the FPGA and used to implement real time digital calibration on all analog I/O.
The sample clock can be derived internally or externally. If derived internally from the onboard timing circuitry, either several traditional divide by N counters or a pair of onboard Direct Digital Synthesizers (DDSes) may be used. The DDSes provide programmable sampling rates with precision up to +/-1hz resolution. An externally sourced sample clock can also be used to accommodate a variety of sampling schemes. All ADC sample clocks are routed to an external connector in the case that multiple cards need to be synchronized to a common clock.
Thirtysix (36) general purpose, highly flexible digital I/O lines are also available, four (4) of which can also double as a pair of Quadrature Encoder inputs, or as a set of four (4) individual Pulse/Frequency I/Os lines. These lines are in addition to any of the digital I/O lines native to the DSP carrier card, such as its own serial ports and timers.
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Software Support
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| All functions for the SI-MOD68xx are fully programmable with QuVIEW and QuBASE, which are a set of DSP-resident libraries for real time performance that greatly accelerate data acquisition, signal processing, and control applications. QuVIEW is a real time accelerator for LabVIEW, and QuVIEW a real time accelerator for Visual Basic. A full range of examples and tutors are provided to demonstrate their ease of use and breadth of functionality and capabilities. Complete driver support for all Windows and Linux
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