TMS320VC33 DSP Board for cPCI/PXI Bus


Product Details:

Overview

Technical Specifications

Ordering Information

Datasheet (pdf)


Related Information:

Peripheral Boards

Accessories

Software Tools

Hardware Tools

Technical Support


SI-C33DSP-cPCI: Technical Specifications


Processor

Texas Instruments TMS320VC33:

150Mhz clock frequency
Single DMA channel.

Memory

SRAM Options:

"-128" option: 128K x 32 bit words one (1) wait state dual access SRAM on C33's primary bus.
"-512" option: 512K x 32 bit words one (1) wait state dual access SRAM on C33's primary bus.
"-1M" option: 1M x 32 bit words one (1) wait state dual access SRAM on C33's primary bus.

 

Interface to Host

PCI initiated bus master transfer speeds:

Up to 132Mbyte/sec bursts with block sizes of eight (8) 32 bit words.
Up to 12Mbyte/sec sustained transfers of any block size, using DMA.

Three 32 bit, bi-directional communications modes between TMS320C33 primary bus and the 9054:

Dual access mode.
Bus master mode, using the 9054 as the cPCI/PXI bus mastering.
Bus master mode, using the DSP as the cPCI/PXI bus mastering.

PCI Bus Bridge PCI9054:

The 9054's internal registers are mapped into the C33's primary bus, address space starting at 0xFF0000

Interrupts:

INT0 used by C33 for basic communication and DMA transfer initialization; INT2 and INT3 available on expansion connectors.

Peripheral Expansion

One external 100 pin half pitch DSUB connector (Hippi style), and four 50 pin half pitch DSUB plug connectors (I-Pack style):

First 50 pin DSUB pair for interfacing custom/expansion daughter board to the DSP's bus.
Second 50 pin DSUB pair for interfacing external user defined signals to custom/expansion daughter board. Linked only to externally accessible 100 pin half pitch DSUB connector, J1.
External 100 pin, half pitch (0.050"), Series III DSUB connector, designated J1, for interfacing external user defined signals to P1. AMP part 787169-9, 787170-9, or 787362-9; Thomas & Betts part HFR100RA29CS1.

Second DSUB connector pairs decode 8Kx32 words, mapped into the C33's primary bus, address space ranging from 0xFE0000 to 0xFE1FFF and contains the following C33 signals:

Address: A12-A0.
Data: D31-D0
Control: R/W, STRB, INT2 & INT3, IACK, RDY, H1 & H3.
I/O lines: Serial port 0, XF0 & XF1, TMCK0 & TMCK1.
Host +3.3Vdc, +5Vdc, +/-12Vdc and GND.

Miscellaneous Connectors:

One 2x10 pin header for direct access to DSP's serial bus
One 14 pin header for JTAG port

Software

Win98/2000/XP and Linux driver support.
Extensive QuVIEW DSP-resident libraries for LabVIEW, including examples for real time acquisition, signal processing, and control.
Extensive QuBASE DSP-resident libraries for Visual Basic, including examples for real time acquisition, signal processing, and control.
Sample code for COFF loaders, PC <-> DSP communications source code and SI-DDK.
Compatible with separately purchased TI debuggers C/C++ compiler, assembler and linker.

Physical Dimensions & Electrical Requirements

3U size cPCI/PXI-bus card measuring 160mm(L) x 100mm(H).
1 watt typical (2 watts maximum) with 128Kx32 words SRAM.